A computer performs tasks based on certain instructions provided to it. Instructions provided to a computer are divided into different fields or groups. Each field provides some specific information. The contents of a field are written in binary language. The instruction register of a basic computer is 16 bits. Instructions comprise the following fields:
Operation field: This field indicates what operation is to be performed, for example, addition, subtraction, multiplication, etc.
Address field: This field indicates the memory location of the operand
Mode field: This field indicates how the memory address of the operand is determined
A computer instruction can be in one of the following formats:
Memory reference instructions
Register reference instructions
Input-output instructions
Memory Reference Instruction
This type of instruction is divided into three parts-mode, opcode and address. The first 12 bits of memory (0-11) specify an operation address. The next three bits (12-14) specify an opcode, and the last bit (I) specifies the addressing mode. If I is 0, it specifies a direct addressing mode, and if I is 1, it specifies an indirect addressing mode.
The operands specified by memory reference instructions are:
AND: This instruction performs the ‘AND’ logical operation between the accumulator’s contents and the content that resides in the memory address specified by the instruction. The final result of the operation is stored in the accumulator.
ADD: This instruction adds the content stored in the accumulator with the content stored in the address mentioned in the instruction and stores the result in the accumulator.
LDA: This instruction stores the operand from a memory location in the accumulator.
STA: This instruction stores the accumulator’s content in the address specified by the instruction.
BUN (Branch Unconditionally): This instruction mentions the address of an instruction that is to be executed out of sequence.
BSA: The ‘Branch and Save Return Address’ (BSA) instruction transfers the execution of a program to another portion (a subroutine) which is to be executed out of sequence.
ISZ: This instruction increases the value of the effective address by 1. If the value after incrementation is equal to zero, the value of the program counter increments by 1. Its full form is Increment and skip if zero.
Register Reference Instruction
This type of instruction is divided into three parts – mode, opcode, and register operation.The first 12 bits of memory (0-11) specify a register operation. The next three bits (12-14) specify an opcode. The opcode for a register reference instruction is always 111. The last bit specifies the addressing mode. This bit is always zero.
The different types of register operations are as follows:
Symbol | Description | Hexadecimal code |
HLT | Halt computer | 7001 |
SZE | Skip if E is zero | 7002 |
SZA | Skip if accumulator is zero | 7004 |
SNA | Skip if accumulator is negative | 7008 |
SPA | Skip if accumulator is positive | 7010 |
INC | Increment accumulator | 7020 |
CIL | Circulate left | 7040 |
CIR | Circulate right | 7080 |
CME | Complement E | 7100 |
CMA | Complement accumulator | 7200 |
CLE | Clear E | 7400 |
CLA | Clear accumulator | 7800 |
Input-output instruction
This type of instruction is divided into three parts – mode, opcode, and input/output operation.The first 12 bits of memory (0-11) specify an input/output operation. The next three bits (12-14) specify an opcode. The opcode for an I/O reference instruction is always 111. The last bit specifies the addressing mode. This bit is always 1.
The different types of I/O operations are as follows:
Symbol | Description | Hexadecimal code |
IOF | Interrupt off | F040 |
ION | Interrupt on | F080 |
SKO | Skip on flag output | F100 |
SKI | Skip on flag input | F200 |
OUT | Output the contents from an accumulator | F400 |
INP | Input a character to accumulator | F800 |
Conclusion
The instruction given to a computer consists of three fields-mode, opcode and address. This instruction can be of one of the three formats:
Memory reference instruction
Register reference instruction
Input-output instruction
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