Logic gates are simple digital circuits that can perform some basic mathematical logical operations. There are primarily seven basic gates in digital electronics. Those are
NOT gate
OR gate
AND gate
NOR gate
NAND gate
Ex-OR gate
Ex-NOR gate
Generally, these gates have multiple inputs and a single output. We can build a digital electronic circuit by using these different gates. In this article, we will study the symbol, working, truth table of 2 and 3 input XNOR gates.
Exclusive NOR gate –
Exclusive NOR gate is a simple combination of XOR gate and NOT gate. Let us consider a two-input XNOR gate as shown in the diagram below:
Symbol –
The two inputs are represented by the letters P and Q, respectively. A single output is represented by the letter ‘Y’.
Mathematical output Expression –
The output of the XNOR gate is related to the inputs A and B as per the expression given below:
Y=(PQ)
∴ Y=(P.Q+P.Q) ……..(1)
The symbol represents the mathematically logic gate operation called ‘Exclusive addition’.
P and Q are the binary inputs that can have only a ‘High(1)’ or a ‘Low(0)’ value.
Working and truth table –
The truth table for 2-input XNOR gate –
P | Q | Y |
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
The two inputs can individually have only two possible values, either “1” or “0”. Depending on that, there are four possible combinations for inputs, and four different outputs can be read.
Case 1 – When P=0, Q=0, the output Y=1
We can verify this by substituting values of P, Q, Y in the equation (1),
∴ Y=(P.Q+P.Q)=(0.0+0.0)=(0.1+1.0)=0=1
Case 2 – When P=0, Q=1, the output Y=0
∴ Y=(P.Q+P.Q)=(0.1+0.1)=(0.0+1.1)=1=0
Case 3 – When P=1, Q=0, the output Y=0
∴ Y=(P.Q+P.Q)=(1.0+1.0)=(1.0+0.0)=1=0
Case 4 – When P=1, Q=1, the output Y=0
∴ Y=(P.Q+P.Q)=(1.1+1.1)=(1.0+0.1)=0=1
These are four different cases of working XNOR gate.
Construction –
XNOR gate can be constructed by using NOR gate and NAND gate. These two gates are universal. We can construct any other gate using these two.
Fig.1 and fig.2 below show the construction of the XNOR gate using NAND and NOR gate, respectively.
Fig.1 XNOR gate using NAND gate
Fig.2 XNOR gate using NOR gates
Three input XNOR gate –
We have seen the truth table and working of the two-input XNOR gate. In this section, we will study the working and truth table of the three-input XNOR gate.
Logical expression –
Y=PQR
∴ Y=(PQ+PQ)R
Three-input XNOR gate has three inputs, namely P, Q, and R, and one output, Y.
The truth table is as follows –
P | Q | R | Y |
0 | 0 | 0 | 1 |
0 | 0 | 1 | 0 |
0 | 1 | 0 | 0 |
0 | 1 | 1 | 1 |
1 | 0 | 0 | 0 |
1 | 0 | 1 | 1 |
1 | 1 | 0 | 1 |
1 | 1 | 1 | 0 |
Each input can have either a high(1) or low(0) state. Thus, there are eight(8) different combinations of three inputs. Therefore, we get eight(8) different outputs corresponding to the input combinations. Let us see the possible cases of input and output combination.
Case 1 – When P=0, Q=0, R=0, the output Y=1
Y=(PQ)R=(P.Q+P.Q)R=(0.0+0.0)0
∴ Y=00=1
Case 2 – When P=0, Q=0, R=1, the output Y=0
Y=(PQ)R=(0.0+0.0)1=(0.0+0.0)1
∴ Y=01=0
Case 3 – When P=0, Q=1, R=0, the output Y=0
Y=(PQ)R=(0.1+0.1)0=(0.0+1.1)0
∴ Y=10=0
Case 4 – When P=0, Q=1, R=1, the output Y=1
Y=(PQ)R=(0.1+0.1)1=(0.0+1.1)1
∴ Y=11=1
Case 5 – When P=1, Q=0, R=0, the output Y=0
Y=(PQ)R=(1.0+1.0)0=(1.1+0.0)0
∴ Y=10=0
Case 6 – When P=1, Q=0, R=1, the output Y=1
Y=(PQ)R=(1.0+1.0)1=(1.1+0.0)1
∴ Y=11=1
Case 7 – When P=1, Q=1, R=0, the output Y=1
Y=(PQ)R=(1.1+1.1)0=(1.0+0.1)0
∴ Y=00=1
Case 8 – When P=1, Q=1, R=1, the output Y=0
Y=(PQ)R=(1.1+1.1)1=(1.0+0.1)1
∴ Y=01=0
These are the eight possible cases for a three-input XNOR gate.
XNOR IC –
IC 4077
IC 74266
Conclusion –
XNOR is a derived gate. It is a combination of XOR and NOT gate. In this article, we have seen 2-input and 3-input XNOR gates along with their truth tables and working. XNOR is widely used to construct half adder and full adder circuits.