Computer Instructions

Instructions given to a computer allow it to perform some specific tasks. A basic instruction is divided into three fields – the operation field, the address field and the mode field. The operation field indicates the operation to be performed, the address field indicates the memory location of the operand, and the mode field indicates how the memory address of the operand is determined. Instructions can be divided into various types based on the number of address fields it contains, the instruction format and the instruction code format. When an instruction enters a computer, it goes through an instruction cycle.

Instruction formats

• Three address instructions

A three-address instruction consists of three address fields. Each address field can specify either a memory operand or a register.

• Two address instructions

A two-address instruction consists of two address fields. Each address field can specify either a memory operand or a register. This addressing format is most common in commercial computers.

• One address instructions

A one-address instruction consists of only one address field. For any data manipulation, the accumulator (A) register is used here. 

• Zero address instructions

A zero-address instruction does not contain any address. A stack organised computer uses this addressing mode. The operations in this addressing mode are performed by instructions such as PUSH and POP. 

Types of instruction code formats

• Memory reference instructions

This type of instruction is divided into three parts – mode, opcode and address. In a memory reference instruction, the first twelve bits specify an address which stores an operation. The next three bits specify the opcode, and the last bit specifies the addressing mode. 

• Register reference instructions

This type of instruction is divided into three parts – mode, opcode and register operation. In a register reference instruction, the first twelve bits specify a register operation, the following three bits specify the opcode (111), and the last bit specifies the addressing mode (0). 

• Input/output instructions

This type of instruction is divided into three parts – mode, opcode and input/output operation. In an input-output reference instruction, the first twelve bits specify an input/output operation, the following three bits specify the opcode (111), and the last bit specifies the addressing mode (1). 

Types of addressing modes in instructions

• Implicit addressing mode – In this mode, the instruction contains the operand, but indirectly. For example – CMA (Complement accumulator)

• Immediate addressing mode – In this mode, the instruction contains the operand along with the opcode. For example, MVI B 05

• Direct addressing mode – In this mode, the address field of the instruction specifies the address of the data to be used in the operation. For example, LDA 2050

• Indirect addressing mode – In this mode, the address field of the instruction specifies an address. This address contains the data address to be used in the operation. For example, LOAD R1 @500

• Register addressing mode – In this mode, the instruction specifies a register. This register stores the data which is required for the operation. For example – ADD B

• Register indirect addressing mode – The instruction specifies a register in this mode. This register stores the address of the data which is to be used in the operation. For example – LDAX B

• Auto-increment/decrement addressing mode – In this mode, the register is used to access a memory location. After the memory location is accessed, the contents of the register increase by 1. For example – LDA (R1)+, LDA -(R1)

• Relative addressing mode – In this mode, the sum of the contents that reside within the address field and the program counter gives the effective address of the data

• Indexed addressing mode – In this mode, the sum of the contents that reside within the address field and the index register gives the effective address of the data

• Base register addressing mode – In this mode, the sum of the contents that reside within the address field and the base register gives the effective address of the data

Instruction cycle

The steps of an instruction cycle are:

• Fetch the instruction 

The program counter stores the address of the instruction to execute next. This instruction is fetched from the memory and stored in the instruction register. After the instruction is fetched, the content of the program counter is increased by 1.

• Decode the instruction

The decoder executes the instruction stored in the instruction register

• Read effective address

The address of the operand is read from the instruction. In some cases, the operands are read directly from the instruction.

• Execute the instruction

Information read and decoded from the instruction is passed to the functional unit of the CPU by the control unit. The result of the operation is either sent to an output device or stored in the memory.

Conclusion 

A computer performs tasks based on the instructions given to it. An instruction consists of a mode field, address field, and operation field. An instruction can be of one of four formats based on the number of addressing fields – zero address instruction, one address instruction, two address instruction and three address instruction. Based on the type of instruction code, an instruction can be of three types – memory reference instructions, register reference instruction and input/output instruction. 

An instruction can have the following addressing modes:

• Direct addressing mode

• Indirect addressing mode

• Implied addressing mode

• Immediate addressing mode

• Register addressing mode

• Register indirect addressing mode

• Increment/decrement addressing mode

• Relative addressing mode

• Base register addressing mode

• Indexed addressing mode

An instruction cycle consists of the following steps:

• Fetch the instruction

• Decode the instruction

• Read the effective address

• Execute the instruction