Lesson 1 of 11 • 15 upvotes • 12:57mins
This video is an overview of digital design with verilog. Emergence of HDLs, typical design flow, importance and features of HDLs are discussed along with the trends in HDLs
11 lessons • 2h 14m
Overview of Verilog HDL
12:57mins
Hierarchical Modeling
12:08mins
Basic Concepts
13:10mins
Basic Concepts (Continuation)
13:37mins
Ports and Connections
10:20mins
Gate Level Modelling
14:20mins
Operators
9:51mins
Operators (part 2)
12:36mins
Operators (part 3)
11:10mins
Dataflow Modeling
12:13mins
Dataflow Modeling (part 2)
11:44mins