Lesson 19 of 53 • 1 upvotes • 9:20mins
GATE-EEE solved answers on digital circuits
53 lessons • 9h
Part 1-Number Systems
15:00mins
Part 2 - Binary Codes
14:55mins
Boolean Algebra
14:45mins
Part 3 Continued - Boolean Algebra
10:49mins
Part 4-SOP and POS
12:15mins
K-map
14:42mins
K map continued 1
13:16mins
Part 5- K map continued
10:26mins
Quine Mc cluskey algorithm for finding the minimal SOP
14:19mins
Logic gates along with GATE questions
11:54mins
IC digtial logic families
14:00mins
Special characteristics of IC Digital logic families
12:17mins
NAND NOR implementation
9:44mins
Adders and subtractors
14:22mins
Full subtractor , parallel adders and parallel subtractors
11:25mins
Multiplexers and demultiplexers
12:50mins
Encoders and decoders
8:38mins
Important questions related to digital logic circuits
9:06mins
GATE solved answers
9:20mins
Code converters
9:31mins
Latches
14:40mins
SR flip flop and D flip flop
8:35mins
Latches( JK flip flop and T flip flop)
9:59mins
Realisation of one flip flop using another flip flop
11:30mins
Realisation of one flip flop using another flip flop(continued)
9:14mins
Minterms and Maxterms
10:23mins
Solved GATE questions
9:40mins
Solved GATE questions
9:31mins
Solved GATE questions
6:35mins
Mod 6 counter
8:45mins
Master slave JK flip flop
7:02mins
Code converters
11:14mins
Design of a counter
8:35mins
Solved GATE questions
10:16mins
Classification of memories
9:09mins
Types of ROM (continued)
8:00mins
Random Access Memory
7:56mins
Types of ROM
12:43mins
Read only memory
9:24mins
Field Programmable Gate Array
7:22mins
BCD to gray code PLA
6:53mins
BCD to gray code PLA
6:53mins
Solved GATE questions
7:44mins
BCD to gray code PLA
6:53mins
Various Approaches of VHDL
11:22mins
Programmable Array Logic
7:18mins
Programmable Logic Array
8:19mins
Solved problems on PAL
6:51mins
Various Approaches of VHDL
11:22mins
Solved problems on PLA
7:44mins
Johnson counter
8:04mins
Universal shift registers
9:36mins
Ring counter
6:54mins