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Full Adder
Lesson 4 of 15 • 13 upvotes • 12:00mins
Jigyasa Singh
*Correction- In FA using NAND gate diagram, one connection line will go from o/p of Gate5 to i/p of Gate9. The error is deeply regretted. Thank you for showing unwavering support.
Adders and Subtractors for GATE
15 lessons • 2h 10m
1
Introduction to Combinational Circuits
7:00mins
2
Half Adder
9:32mins
3
Half Subtractor
6:07mins
4
Full Adder
12:00mins
5
Full Subtractor
8:34mins
6
Serial Adder
4:44mins
7
Parallel Adder
7:30mins
8
Carry look ahead adder
10:12mins
9
Binary adder subtractor
11:28mins
10
BCD adder
7:47mins
11
Excess-3 adder
9:28mins
12
2bit by 2bit binary multiplier
9:32mins
13
4bit by 3bit binary multiplier
9:20mins
14
Gate Question (1997-1999) | Important
8:23mins
15
Gate Questions (2003-2014) | Important
8:22mins
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