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Direct Memory Access(DMA) Controlled Transfer

Lesson 36 of 38 • 37 upvotes • 12:31mins

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Danish Aggarwal

In this lesson, we will see the basic Concept of DMA controller and its modes of data transfer.

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1

Course Overview (in Hindi)

12:01mins

2

Types of Computer Architecture (in Hindi)

13:49mins

3

Instruction Cycle (in Hindi)

14:00mins

4

Introduction to Control Unit (in Hindi)

14:21mins

5

Microprogrammed Control Unit (in Hindi)

14:56mins

6

Introduction to Pipelining (in Hindi)

14:45mins

7

Instruction Pipelining

14:42mins

8

Numericals on Pipelining

14:33mins

9

Pipelining Hazards-1

14:55mins

10

Pipelining Hazards-2

14:33mins

11

Concept and numericals of CPI

14:01mins

12

Introduction to Data Representation

14:46mins

13

2'sComplement Representation

14:59mins

14

Introduction to Floating Point Representation

14:18mins

15

Concept of Excess-Bias in exponent

12:11mins

16

Range of floating point representation

12:32mins

17

ESE PYQ on Data Representation-1

13:17mins

18

ESE PYQ on Data Representation-2

15:00mins

19

Concept of Associative Memory

8:47mins

20

Cache Memory-1

13:31mins

21

Cache Memory-2

13:47mins

22

Cache Memory-3

12:50mins

23

Direct Mapping-1

13:50mins

24

Direct Mapping-2

14:37mins

25

Fully Associative Mapping

12:20mins

26

K-way set associative mapping

13:59mins

27

ESE PYQ on Cache Memory-1

14:16mins

28

ESE PYQ on Cache Memory-2

14:38mins

29

CISC Vs RISC

14:41mins

30

Structure of Hard Disk-1

11:41mins

31

Structure of Hard Disk-2

14:23mins

32

ESE PYQ Numericals on Hard Disk

13:40mins

33

I-O Organization in Computer Architecture

11:07mins

34

I-O Organization in Computer Architecture

12:45mins

35

Interrupt-Initiated I-O

12:38mins

36

Direct Memory Access(DMA) Controlled Transfer

12:31mins

37

Practice Questions on I-O Organization

12:13mins

38

ESE 2019 Mains Questions-1

13:28mins

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