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3 bit Synchronous up/down counter- Part 2
Lesson 10 of 15 • 4 upvotes • 9:59mins
Ayushi Agarwal
This lesson is the extension of the previous one, the simplified equations are obtained using K map and the logic diagram is made. The trick to make the 4 bit up/down synchronous counter is also mentioned in this lesson.
Counters and Registers for GATE
15 lessons • 2h 35m
1
Introduction to Counters
13:15mins
2
Types of Counters
8:48mins
3
Asynchronous Counter
11:20mins
4
Asynchronous Down Counter
11:07mins
5
Asynchronous Up/Down Counters
11:57mins
6
Modulus of the counter
10:41mins
7
BCD counter
8:17mins
8
Synchronous counter
10:38mins
9
3 bit up/down synchronous counter- Part 1
11:44mins
10
3 bit Synchronous up/down counter- Part 2
9:59mins
11
Introduction to Registers
10:07mins
12
Types of registers
9:02mins
13
SISO shift registers
10:34mins
14
SIPO and PIPO
8:36mins
15
PISO register
9:38mins
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