https://uadoc.uacdn.net/doubts/8A7H5ZYNHB/1635559472IZGHE1SD.JPEG

A non-pipelined CPU has 12 general purpose registers (RO, R1, R2, ..... R12). Following operation are
supported:
ADD Ra, Rb, Rr Add Ra to Rb and store the result in Rr
MUL Ra, Rb, Rr Multiply Ra to Rb and store the result in Rr
MUL operations takes two clock cycles, ADD takes one clock cycle.
Calculate minimum number of clock cycles required to compute the value of the expression
XY + XYZ + YZ. The variables X, Y, Z are initially available in registers RO, R1 and R2 and contents of these
registers must not be modified.
(A) 5
(B) 6
(C) 7
I
(D) 8
Answer: (B)


English

Educator solution

CS & IT

GATE - CSIT, DSAI & Interview Preparation

GATE, ESE and IIT-JAM

Ace the toughest competitive and government exams in India 

Doubt solution

Doubt details

CS & IT

AUTO-GENERATED

Solutions available

Educator solution