AWS Cloud Support Associate(Networking); B.Tech-IT from Maharaja Surajmal Institute of Technology.

Payal Gupta

In this course, you will learn about various concepts of Digital Logic in detail with previous year GATE questions.

GATE (Graduate Aptitude Test in Engineering) 2020 & 2021 complete preparation with best educators. Know about the detailed syllabus, best books, exam pattern and dates, previous year question papers a

GATE & ESE

Hindi

(Hindi) Digital Logic: GATE (CS and IT)

Sequential Circuit

Digital Logic

CS & IT

GATE - CSIT, DSAI & Interview Preparation

GATE, ESE and IIT-JAM

Ace the toughest competitive and government exams in India 

Test Preparation

This lesson is about the introduction and procedure to design Combinational Circuits with example.

Introduction to Combinational Circuits (in Hindi)

In this lesson, we will learn about classification of adders and half adder implementation.

Half Adder (in Hindi)

This lesson is about half adder implementation using NAND and NOR gates.

Half Adder using Universal Gates (in Hindi)

This lesson is about implementation of full adder and its modified carry expression.

Full Adder (in Hindi)

This lesson is about full adder implementation using half adder and NAND gate.

Full Adder using NAND/NOR/Half Adder (in Hindi)

This lesson is about previous year GATE questions and full adder designing using NOR gate.

GATE Questions on Adders

This lesson is about half subtractor and its implementation.

Half Subtractor

This lesson is about designing of half subtractor using NAND/NOR gates.

Half Subtractor using Universal Gates

This lesson includes implementation of full subtractor with both minimal and modified borrow expression.

Full Subtractor

This lesson includes the implementation of full subtractor using NAND/NOR gates and half subtractor.

Full Subtractor using Universal Gates/Half Subtractor

In this lesson, we will learn about implementation of full subtractor using NOR gate and designing of a common circuit for half subtractor and half adder using controlled XOR gate.

Common Circuit for Half Subtractor and Half Adder

In this lesson, we will discuss serial adder and its working.

Serial Adder

In this lesson, we will discuss about binary parallel adder or ripple carry adder with its working.

Binary Parallel Adder/Ripple Carry Adder

Some important questions on ripple carry adder in detail.

Important Questions on Ripple Carry Adder

In this lesson, we will discuss look-ahead carry adder with its circuit diagram in detail.

Look-ahead Carry Adder

In this lesson, we will discuss 4 bit parallel subtractor and common binary adder-subtractor circuit in detail.

Parallel Subtractor and Binary Adder-Subtractor

In this lesson, you will learn about multiplexer introduction, size of MUX and circuit diagram of 2×1 MUX in detail.

Multiplexer(MUX)

In this lesson, we will design 4×1 MUX and also, will understand how to design higher order MUX using lower order MUX with the help of examples.

Higher Order MUX using Lower Order MUX

This lesson is in continuation with the previous one on the topic of designing higher order MUX using lower order MUX with some more examples and a general formula.

Higher Order MUX using Lower Order MUX-part2

In this lesson, we will do previous year GATE questions on MUX.

Previous Year GATE Questions on MUX

In this lesson, we will learn about demultiplexer and its working in detail by designing 1×2 DEMUX.

De-multiplexer(DEMUX)

In this lesson, we will design 1×4 DEMUX and also will do questions on it.

Questions on DEMUX

Mentored 81,000+ Students | My Multiple Students secured AIR Below 100 in GATE | Joined top IISc, IITs & NITs | Joined PSUs | 5+ Years Exp.

Sweta Kumari

This course will cover Awesome Tricks For Flip Flops and Their Conversions.

(Hindi) Flip Flops and their Conversions for GATE(CS and IT)

Today is that tomorrow you talked about yesterday 🌿.


Ansha P

This course covers all the topics of Digital Electronics for GATE examination.

Digital Electronics for GATE

BE , ME (Computer Science Engineering)
3 years of Experience in teaching Engineering students.

Rachana Pathak

The course covers Combinational Logic Circuit.

(Hindi) Combinational Logic Circuit

Vikash .

This course covers the concepts of SR , JK, T, D flip flop,  and Counters for GATE (CS and IT) aspirants

(Hindi) Sequential Circuit : GATE (CS and IT)

In this course, we will learn about the types of circuits in Digital Logic i.e, Combinational Circuits and Sequential Circuits.

Digital Logic: GATE (CS and IT)

In this course , I will cover Number Representation in Digital Logic of GATE.

Lessons

22 lessons • 3h 54m