I am an EC Engineer of 3rd year.
I am a performer not a perfectionist.
Music,Writing are my loves.



Susmitha Kotakonda

This course gives detailed information about MOS transistors and their working, Modes of operation, MOS device design equations and their behaviour in various effects.

GATE (Graduate Aptitude Test in Engineering) 2020 & 2021 complete preparation with best educators. Know about the detailed syllabus, best books, exam pattern and dates, previous year question papers a

GATE - Iconic Pro

English

MOS Transistor Theory

VLSI Technology

Advanced Electronics

GATE & ESE - EE, EC

GATE, ESE and IIT-JAM

Ace the toughest competitive and government exams in India 

Test Preparation

This lesson is the overview of the course which is MOS Transistor Theory.
It consists of the concepts overview and main objectives of the course.

Overview of the course

This lessons talks about intoduction to VLSI design.
It has topics like classification of transistor, Moore's law.

Introduction to VLSI design

This lesson talks about concepts like: 
1.channel length
2.power triangle
3.reactive power
4.real or true power
5.apparent power
6.nmos depletion mode
7.nmos enhancement mode

Basic MOS Transistor and its Working - Part 1

This lessons consists of concepts like:
1.Pmos enhancement mode     transistor.
2.Pmos depletion mode transistor.
3.Accumulation mode.
4.Depletion mode.
5.Inversion mode.

Basic MOS Transistor and its Working - Part 2

This lesson consists concepts like:
1.Normal conduction characteristics of MOS.
2.Avalanche breakdown.
3.Ids vs Vds relations.
4.Ids for non saturation mode.

Ids in Non-saturation Region of CMOS

This lesson talks about the concepts like :
1. Ids in saturation region.
2.Threshold voltage
3.Threshold voltage equations
4.Vt-mos

Ids in Saturation Region in CMOS

This lesson talks about the concepts like:
1.Flat band voltage.
2.Channel Length Modulation.

Channel Length Modulation in CMOS

This lessons consists of topics like:
1.MOS transistor circuit model.
2.Body Effect.

MOS Transistor Circuit Model and Body Effect

This lesson talks about the concepts like:
1.Pull up and Pull down network in CMOS.
2.CMOS Inverter.

Pull Up and Pull Down Networks in CMOS

This lesson talks about the topics:
1.Threshold voltage wrt Body Effect.
2.Cmos Inverter DC Characteristics.

CMOS Inverter DC Characteristics - 1

Lesson name: verilog half adder
 Topics covered:verilog programming of half adder

Half Adder Verilog Code

Lesson name:Half Adder using Nand Gates Verilog
Topics covered: Half adder using Nand gates verilog programming

Half Adder Using NAND Gates Verilog

Lesson name:One bit full adder
Topics covered:one bit full adder verilog programming

One Bit Full Adder Verilog

electronics and communication engineer
pursuing M.Tech in vlsi technology


Ritika Chaudhary

this course deal with engineering student of electronics and communication background or vlsi technology background

(Hindi) Advanced vlsi Design

Research Assistant at Electronic Systems Engineering, Indian Institute of Science (IISc), Bangalore, GATE Qualified

Rudrarup Sengupta

This course in English and will guide you to understand the basics of IC fabrication required for GATE (EC). Only the required points are mentioned in interactive slides set with real-life examples.

IC Fabrication Technology and Processes

I'm an M.E graduate in embedded systems and technologies.  Cleared NET examination  in electronic science conducted by CBSE-UGC.

Niranjani S

This course deals with verilog coding techniques/types.

Verilog Coding

Neha Singh

This course is an overview of Digital Design with Verilog HD: typical HDL-flow, why Verilog HDL, Hierarchical Modeling Concepts: Top-down and bottom-up design methodology, differences between modules and module instances, parts of a simulation, design block, stimulus block etc.

Verilog HDL

I am pursuing  B.Tech in ECE. I like teaching .I hope my lessons will be beneficial for BTech students.

Shifali Srivastava

In this course, Shifali shall be discussing FSM types and examples. The course is for B Tech Students

Finite State Machine for B Tech Students

I have completed M.Tech in E&TC ( Signal Processing) and currently pursuing Ph.D.at Pune University. I have qualified GATE 2013.I have teach

Sarang Joshi

FIR filter design using windows , Frequency sampling , IIR filter design , implementation of Digital filters

Lessons

13 lessons • 2h 30m

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Overview of the course

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Introduction to VLSI design

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Basic MOS Transistor and its Working - Part 1

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Basic MOS Transistor and its Working - Part 2

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Ids in Non-saturation Region of CMOS

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Ids in Saturation Region in CMOS

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Channel Length Modulation in CMOS

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MOS Transistor Circuit Model and Body Effect

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Pull Up and Pull Down Networks in CMOS

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CMOS Inverter DC Characteristics - 1

+ See all lessons